Add cache functions to SPL for armv7

Signed-off-by: Stefano Babic <[email protected]>
CC: Tom Rini <[email protected]>
CC: Wolfgang Denk <[email protected]>
CC: Simon Schwarz <[email protected]>

diff --git a/arch/arm/cpu/armv7/Makefile b/arch/arm/cpu/armv7/Makefile
index f97fa3d44824c7fb442d927d3e1fe223f362f4a2..6b2addca11caeb4fd43bc2162cd7686f436e3042 100644 (file)
--- a/arch/arm/cpu/armv7/Makefile
+++ b/arch/arm/cpu/armv7/Makefile
@@ -27,9 +27,7 @@ LIB   = $(obj)lib$(CPU).o
 
 START  := start.o
 
-ifndef CONFIG_SPL_BUILD
 COBJS  += cache_v7.o
-endif
 
 COBJS  += cpu.o
 COBJS  += syslib.o

diff --git a/arch/arm/cpu/armv7/cpu.c b/arch/arm/cpu/armv7/cpu.c
index 662c4962e6e3994a66240ceb442a70cd5303a129..c6fa8ef13617636a8c879cccbae626bf6ee8c2e1 100644 (file)
--- a/arch/arm/cpu/armv7/cpu.c
+++ b/arch/arm/cpu/armv7/cpu.c
@@ -52,7 +52,9 @@ int cleanup_before_linux(void)
         *
         * we turn off caches etc ...
         */
+#ifndef CONFIG_SPL_BUILD
        disable_interrupts();
+#endif
 
        /*
         * Turn off I-cache and invalidate it

diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 300c8fab2d1256436bd9579697666e2d95f2ce27..39a9550376fa67d38d71bdacc98157cf903ee58d 100644 (file)
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -39,8 +39,6 @@ GLCOBJS       += div0.o
 
 COBJS-y        += board.o
 COBJS-y        += bootm.o
-COBJS-y        += cache.o
-COBJS-y        += cache-cp15.o
 COBJS-$(CONFIG_SYS_L2_PL310) += cache-pl310.o
 COBJS-y        += interrupts.o
 COBJS-y        += reset.o
@@ -48,6 +46,9 @@ SOBJS-$(CONFIG_USE_ARCH_MEMSET) += memset.o
 SOBJS-$(CONFIG_USE_ARCH_MEMCPY) += memcpy.o
 endif
 
+COBJS-y        += cache.o
+COBJS-y        += cache-cp15.o
+
 SRCS   := $(GLSOBJS:.o=.S) $(GLCOBJS:.o=.c) \
           $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
 OBJS   := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))